Performance Analysis of a 15 Level Cascaded Multilevel Inverter with Reduced Switches

Multi-level inverters are widely used in high and medium voltage applications as it affords high voltage output without transformer. Apart from this, it also reduces switching losses and voltage stress on switches. When the number of levels are increased, there will be a reduction in Total Harmonic Distortion (THD) but the usage of more number of semiconductor switches is increased. This in turn increases the size and cost of the inverter. Hence in order to overcome this problem, this work proposes a novel 15 level multilevel inverter topology with the reduced number of switches. Space Vector Pulse Generation Circuit is implemented to generate switching pulses for voltage source inverter. This proposed topology was simulated using the MATLAB and experimental results are furnished to validate the efficiency of this method.