A Novel Architecture for OFDM with LDPC CODED NCO

Technological developments in power line communication leads to communication systems operating at data rates greater than200Mbps.OFDM architecture forms the physical layer is of utmost importance. One of the major concerns in a PLC is noise and low speed architectures. In this article, a novel NCO based architecture with LDPC codes for OFDM is proposed. The NCO architecture is aparallelized architecture that generates orthogonal carriers for modulation. The NCO architecture is designed to minimize harmonics in orthogonal carriers and hence reduces PLC noise. Soft errors are detected and corrected using error detection unit using LDPC codes. A Software reference model is developed in Simulink to validate the NCO architecture and OFDM model. HDL code is developed for the proposed architecture and is synthesized using Xilinx ISE targeting Virtex-5 FPGA