Asian Journal of Research in Social Sciences and Humanities
  • Year: 2017
  • Volume: 7
  • Issue: 2

VLSI Implementation of RSA Cryptosystems using Montgomery Multplication with Sum Based Adder

*Assistant Professor, Sethu Institute of Technology, Anna University, Chennai, India

**Professor, R.M.D Engineering College, Anna University, Chennai, India

Online published on 14 February, 2017.

Abstract

In Public key cryptosystems, RSA is the most commonly used system because of its faster implementation and high security. Modular exponentiation is the vital function in RSA cryptosystems to achieve both encryption and decryption and it can be performed by doing repeated modular multiplications. Various algorithms are employed to perform modular multiplication. Montgomery algorithm is the mostly adopted algorithm to enhance the speed of the multiplication process. The sum based adder (SBA) is involved to perform the addition operation which replaces the other adder architecture already used in the Montgomery modular multiplication algorithm. The proposed methodology is simulated and synthesized using Xilinx 12.1i with Spartan 3 and Virtex 5 FPGA device. The RSA cryptosystems with proposed method yields the better performance compared with the existing design.

Keywords

RSA (Rivest, Shamir, Adleman), SBA (Sum based Adder), FPGA (Field Programmable Gate Array)