Dual-band sigma-delta ADC for WCDMA/WLAN receivers

The demand for new telecommunication services requiring higher capacities, data rates and different operating modes have motivated the development of new generation wireless transceivers. A sigma-delta based Analog-to-Digital Converter (ADC) is one of the key and complex building blocks in the transceiver architecture. In order to preserve low power consumption requirements demanded by mobile terminals, an analog-to-digital converter ADC converter able to reach significantly high values of signal-to-noise ratio and low distortion by using modest over-sampling ratios is needed. To this end, this work presents a dual-band sigma-delta modulator for WCDMA and WLAN receivers. In particular, the proposed converter makes use of low-distortion swing suppression sigma-delta modulator (SDM) architecture which is highly suitable for low over-sampling ratios to attain high linearity over a wide bandwidth. The modulator employs a 2–2 cascaded sigma-delta modulator with feed-forward path with a single-bit quantizer in the first stage and 4-bit in the second stage. Simulation results show that, the modulator achieves 94/78 dB peak SFDR and 83/62 dB peak SNDR over a 3.84 MHz/10 MHz bandwidth at a sampling frequency of 122.88/160 MHz in WCDMA/WLAN mode.