International Journal of Computational Intelligence Research
  • Year: 2009
  • Volume: 5
  • Issue: 4

DSM Framework with Processor Consistency and Write-update Coherence Protocol: Implementation

  • Author:
  • Bal Gopal1, Pankaj Kumar2
  • Total Page Count: 16
  • Page Number: 469 to 484

1Integral University, Lucknow, India. E-mail: bal.gopal@rediffmail.com.

2Sahara Arts & Management Academy, Lucknow, India. E-mail: pk79jan@rediffmail.com.

Abstract

The parallelism in Distributed Memory System (DSM) system can be improved by data replication and multiple writers and multiple readers algorithm (MRMW). The data replication and MRMW algorithm requires the proper memory consistency maintenance. The memory consistency can be maintained by Write-update coherence protocol by updating the write messages to the all processor in DSM system. A Framework is designed for data replication and improving parallelism for DSM system with the help of Processor Consistency and Writ-update Coherence Protocol. This paper is an effort to implement and verify the said framework.

For the proper implementation of the framework, we have designed an algorithm, which updates the write message to all processor. We have also discussed the mathematical implementation and performance cost of the said framework.

Keywords

DSM, Memory Consistency Model, Cohrenece Protocol