Design of FPGA Based Radix 4 FFT Processor using CORDIC

The Fast Fourier Transform (FFT) is an efficient algorithm for computing the Discrete Fourier Transform and requires less number of computations than that of direct evaluation of Discrete Fourier Transform (DFT). It has several applications in signal processing. But, because of the complexity of the processing algorithm of FFT, recently various radix-r FFT algorithms have been proposed to meet real-time processing requirements and reduce hardware complexity. The FFT processor is a critical block in all multi-carrier systems used primarily in the mobile environment. The main requirement of these systems is low power FFT architectures. This work proposes design of FFT processor using Coordinate Rotation Digital Computer (CORDIC) algorithm to reduce complexity of hardware and improve performance of processing, which will be synthesized on Field Programmable Gate Array. The purpose of this work is to obtain an area efficient description of FFT processor.