Research Issues on Linear, Wide Dynamic Range Time-To-Digital Converter Architectures with Picoseconds Resolution

This paper presents the research issues on the development of Linear, Wide Dynamic range Time-To-Digital Converter (TDC) architectures with picoseconds Resolution for precise measurement of the time intervals. TDC architectures’ evolution from the basic counter based to pipelined architecture with calibrations are analyzed. The timing resolution of a TDC directly determines the minimum resolvable spatial resolution in time-of flight measurements (TOF). In TDCs, good linearity will provide high measurement accuracy, while, the detectable range is limited by its dynamic range. Here we also present the research issues to improve performance metrics like the linearity less than 0.5 LSB, the resolution between 2ps and 5ps with a wide dynamic range of around 2ns to 150 ns with a good Fig. of Merit(FoM).