International Journal of Electronics Engineering Research
  • Year: 2009
  • Volume: 1
  • Issue: 3

Wave Pipelining: An Analysis for High Performance Digital Circuits

  • Author:
  • Hirak Kumar Maity, Mitra Barun Sarkar1, A. Chakrobarty2
  • Total Page Count: 10
  • Page Number: 269 to 278

1College of Engineering & Management, Kolaghat.

2Institute of Engineering and Management.

Abstract

Wave pipelining (WP) is a technique for pipelining digital systems that can increase the clock frequency of practical circuits without increasing the number of internal storage element i.e. latch or registers. Using this technique, new set of input data can be applied to a combinational block before the previous outputs are available at the output. In this way, pipelining of combinational logic block has been used effectively to maximize the utilization of the logic without inserting internal registers. This concept is applicable for single stage as well as for multi stage circuits. Here, in this paper the performances analysis of a three stage circuit has been illustrated with an example with the help of XININX (ver. 7.1) web pack software.