Design of High Speed 32-Bit Data Processing using CSLA

Modern applications demand extremely low power and fast speed in computer architectures for battery-operated devices like Laptop and others. In this work, the main focus is on the low power consumption and provides high speed to the processors. Low-power and high speed circuits are becoming more desirable due to growing portable device markets and they are also becoming more applicable today in processors. The selection behind the carry select adder is that it is very much efficient in terms of delay. The main focus in this work is to improve the speed of the 32-bit processor and in this case the carry select adder is the better choice. The approach used here is to implement these pipelines in a manner that only one pipeline will be activated through which the carry is propagating.