An Implementation of 9-Level MLI using IPD-Topology for Harmonic Reduction

Multi Level Inverters (MLI) are today used in medium and large power applications. There are three major topologies of multilevel inverters; they are capacitor clamped, diode camped and cascaded. During this paper implement the nine-level asymmetric cascaded multilevel inverter with IM for various kinds of level-shifted PWM techniques in Matlab Simulink. As the number of levels will increase, the synthesized output waveform has more steps that produces a staircase wave that approaches the required waveform. Also, as more steps are added to the waveform, the harmonic distortion of the output wave decreases, approaching zero as the number of levels will increase. As the number of levels will increase, the voltage that can be spanned by connecting devices serial also increases.