International Journal of Engineering and Management Research (IJEMR)
  • Year: 2017
  • Volume: 7
  • Issue: 1

Xilinx Implementation of Pulse Width Modulation Generation using FPGA

  • Author:
  • Rahul Patel1, Vijay Prakash Singh2
  • Total Page Count: 5
  • Page Number: 411 to 415

1(M. Tech Student) Department of Electronics and Communication, SSSUTMS University, Sehore, India

2Department of Electronics & Communication Engineering, SSSUTMS University, Sehore, India

Online published on 31 October, 2017.

Abstract

Multi level inverter is used in applications that need high voltage and high current. The topologies of multilevel inverter have several advantages such as lower EMI generation, better output waveform and higher efficiency for a given quality of output waveform. In this paper a XILINX FPGA based multilevel PWM controller design is simulated and compilation portion is tested through VHDL in real time process using hardware-co simulation. The effective controller maintains the voltage to frequency ratio constant. The simulation with experimental results demonstrates quality of voltage and current waveforms with less harmonic content at the output of the cascaded inverter. In this paper we have implemented multilevel inverter using FPGA for the hardware implementation of proposed methodology.

Keywords

Cascaded Multilevel Inverter, FPGA, Pulse Width Modulation, XILINX