International Journal of Engineering Research
  • Year: 2016
  • Volume: 5
  • Issue: 7

Performance Analysis of Quasi-Cyclic Low Density Parity Check Codes

  • Author:
  • Nalini Prasad Tirumani, Patchigolla Subbarao
  • Total Page Count: 4
  • Page Number: 560 to 563

Department of E.C.E, S.R.K.R Engineering College, Bhimavaram, Andhra Pradesh, India

* naliniprasadt@gmail.com

** patsrao@gmail.com

Online published on 9 March, 2017.

Abstract

Low-Density Parity-Check codes are the class of linear block codes, which perform the near Shannon limit performance on data transmission. Here, Quasi Cyclic codes are circulant permutation matrices, for the efficient encoding purpose. In this paper, QC-LDPC Codes have significant performance improvement due to the effective iterative Min-Sum decoding algorithm in terms of Bit Error Rate (BER) versus Eb/No with low and high code rates compared to other existing codes. Soft decision decoding and increased number of iterations of QC-LDPC codes has better performance.

Keywords

LDPC codes, Quasi-Cyclic codes, QCLDPC codes, Min-Sum Decoding Algorithm