A New Fangled Approximate Compressor Design for Multiplication

In this paper, a novel implementation of 4*4 Multiplier using 4–2 Approximate Compressors is presented; which produces quick results, especially for use in Digital Signal Processors and in Microprocessors. We propose 3 approximate 4-2compressor designs which provide better area, power consumption, critical path delay and less number of transistor counts when compared to the exact 4-2compressor designs. Here we used the proposed designs in the multiplication applications, of DADDA tree& WALLACE tree. Dadda tree multiplier is faster than Wallace tree multiplier. Compressors decrease the complexity of multiplier, power consumption and increase the speed by reducing delay with the diminish cost of error rate. Hence, instead of using conventional methods such as approximate compressors used for multiplication. All the circuits are designed and simulated using DSCH and MICROWIND tool.