Survey of energy efficient high performance low power router for network on chip

The Increasing complexity of systems-on-chip (SOCs) pushes researchers to propose efficient Networks-on-Chip (NOCs). Efficient exploitation of performance and scalability are the main advantages of NOCs. Routers in NOCs are used to multiplex packets onto the network links. An important research in router design is the tradeoff between area/power and performance. In this paper we survey efficient router for High performance NOCs.