Assistant Professor, Department of ECE, CMR Technical Campus, Hyderabad, Telangana, India
Online published on 25 April, 2019.
The full adder circuit is an important cell in many processing systems. The full adder circuit is used to add the partial product of multiplier designs. Decreasing the number of transistor count in full adder can result in less power consumption. In this paper, different types of full adders have been implemented using Double Gate MOSFET technique which is mainly used to reduce the short channel effects in the circuits. These circuits have been implemented using TANNER EDA tool, so this result decreasing the total power consumption and delay of full adder.
Full Adder CMOS Double Gate MOSFET Power Delay Product