Head, PG Department of Computer Science, D A V College, Amritsar, Punjab
Online published on 4 December, 2014.
Multistage Interconnection Networks (MINs) interconnect various processors and memory modules. In this paper the incremental permutation passable of Irregular Fault Tolerant MINs having same number of stages named as Triangle, Theta, Omega and Phi Networks have been analysed and compared.
Design of Triangle MIN, Routes available in Triangle MIN, Incremental Permutation passable