1Professor, Department of EEE, Vasavi College Engineering, Hyderabad, TS, India
2Associate Professor, Department of EEE, Christu Jyothi Institute of Technology and Science, Jangaon, TS, India
3P.G student, Department of EEE, Vasavi College Engineering, Hyderabad, TS, India
Online published on 21 March, 2018.
A new topology for cascaded seven level converters with pulse width modulation (PWM) and reduced number of switches for grid connection is presented in this paper. By increasing the number of voltage levels at the output in multilevel converters the power quality is improved. The proposed topology reduces the number of switches and reduces THD with increase in output voltage levels. Reduction in number of switches and number of voltage sources reduces losses, cost and complexity of the converter. Switching strategy and operation principal of proposed seven level cascaded multilevel converters are presented. The proposed inverter has been compared with the five-level PWM inverter. The effectiveness of the proposed inverter analysed using MATLAB/SIMULINK simulation program
Seven level inverter, PWM techniques, reduced components, THD
