Significant contributions have been made in the literature towards the design of arithmetic units, however, there are not many efforts directed towards the design of 16 bit ALU. In this paper, a novel programmable 16 bit ALU using Vedic multiplier and Kogge-Stone adder is presented and verified, and its implementation in the design Arithmetic Logic Unit is demonstrated. Then, implementations of 16 bit Kogge-Stone adders, Vedic multiplier are analysed and compared in terms of delay. The performance characteristics analysis is carried out in Xilinx environment
Vedic Adder, Koggestone Adder, Wallace tree multiplier, Fourth keyword, Fifth keyword
