1Research Scholar, Department of ECE, St. Peter's University, St. Peter's Institute of Higher Education and Research, Avadi, Chennai
2Professor, Department of ECE, Dr M.G.R. Educational and Research Institute University, Maduravoyal, Chennai
Online published on 1 November, 2018.
Fast Fourier Transform (FFT) accomplishes an important role in communication system. Mixed radix 4 & 8 based SDF-SDC FFT using MBSLS for efficient area reduction has been proposed. MBSLS (Modified Borrow Select Subtractor) has been projected for reducing the area and power utilization. Number of additions and multiplication has been reduced by FFT algorithm which is computed in an ordinary complex plane. MBSLA reduce the hardware utilization of the system. Therefore, MBSLS incorporated into the processor which is very useful to design OFDM communication system. Optimization in area and power has been attained by mixed radix 4&8 SDF-SDC FFT structure. Speed of the system has been increased by SDF (structure and SDF structure used to achieve reduction in area and power consumption. Proposed architecture has been simulated by Modelsim simulation environment and performance analyzed by Xilinx 12.4.
Mixed Radix-4 & Radix-8, SDF, SDC, MBSLS, Xilinx 12.4, Modelsim
