International Journal of Scientific Engineering and Technology
  • Year: 2014
  • Volume: 3
  • Issue: 4

VLSI Implementation of Fixed-Point LMS Adaptive Filter with Low Adaptation Delay

  • Author:
  • C. Preethi1, M. Praveena2
  • Total Page Count: 4
  • Page Number: 422 to 425

1PG scholar (M.E., VLSI design), PSNA College of Engineering and Technology, Dindigul, preethiclement21@gmail.com

2Assistant professor/ECE, PSNA College of Engineering and Technology, Dindigul, praveenabe88@gmail.com

Online published on 11 April, 2017.

Abstract

This paper presents the modified delayed LMS adaptive filter consists of Weight update block with Partial Product Generator (PPG) to achieve a lower adaptation delay and efficient area, power, delay. To achieve lower adaptation delay, initially the transpose form LMS adaptive filter is designed but the output contains large delay due to its inner product process. Here, the pipelining structure is proposed across the time consuming combinational blocks of the structure to reduce the critical path. From the simulation results, we find that the proposed design offers large efficient output comprises the existing output with large complexities.

Keywords

Partial Product Generator, Weight update block, Modified DLMS adaptive filter