International Journal of Scientific Engineering and Technology
  • Year: 2014
  • Volume: 3
  • Issue: 5

Analysis of Split Gate Technology for Nano-scale Double Gate MOSFET devices

  • Author:
  • Shekhar Yadav1,2,, Jagdeep Rahul1,2
  • Total Page Count: 2
  • Page Number: 664 to 665

1VLSI Design Lab, Lovely Professional University, Phagwara, Punjab

2VLSI Design Lab, Indian Institute of Information Technology, Gwalior

*Corresponding Email: shekhar.hbad@gmail.com

Online published on 11 April, 2017.

Abstract

In the present paper we have done a comparative analysis of Dual Gate MOSFET having split gate architecture and conventional Dual Gate MOSFET architecture. Simulations have been performed using SILVACO-ATLAS tool, which shows significant improvement in characteristic of split gate architecture in comparison to the conventional structure. The split gate architecture consist two different materials having different work functions placed laterally to form gate terminal of the MOSFET. This novel gate structure takes advantage of material work function difference in such a way that the threshold voltage near the source is more positive than that near the drain (for n-channel FET, the opposite for p-channel FET), resulting in high output impedance of the device.

Keywords

Dual Gate MOSFET, SILVACO-ATLAS, work functions, threshold voltage, output impedance