Minimization of IR Drop Using Diagonal Power Routing Technique in Nanometer Era in VLSI

One of the new technique which is notable for dealing problems such as high frequency effect due to inductance and capacitance in physical layout level other than existing of techniques. For most designs for the use of 45nm processing technology the analysis using a static approach is no longer sufficient and it becomes mandatory to analyse the actual variation of the supply voltage with respect to time for detecting chip failure conditions. In this paper we deal with the IR drop analysis of the Diagonal power grid and orthogonal power grid, comparison between the diagonal and orthogonal power grid. Full chip Diagonal power grid static and dynamic IR drop analysis optimization of power in vlsi digital design using red hawk for nanometer era