Design, Implementation and optimisation of 4x4 mimo-ofdm receiver for communication systems

Multiple Input Multiple Output (MIMO) systems use more than one antenna at both ends of the communication link. For more reliability the number of antennas at receiver should be more than at transmitter side. Over the past decade, the use of MIMO system has rapidly gained popularity due to its enhanced performance capabilities of improved Reliability, Spatial Diversity Gain and Spatial Multiplexing Gain. Orthogonal Frequency Division Multiplexing (OFDM) is one of the best digital modulation schemes, where signal is divided into number of narrow band signals to obtain spectrum efficiency and minimizing the Inter Symbol Interference (ISI). Thus, combining MIMO and OFDM technologies will improve spectral efficiency, Link reliability, spectral gain and data rate.

In this paper, MIMO and OFDM techniques are combined to improve the receiver performance. Software reference model for 4x4-MIMO-OFDM Transmitter for wireless communication system is designed and implemented in MATLAB and the same design is also implemented in C for embedded platforms. The evaluation of Bit Error Rate (BER), Signal to Noise Ratio (SNR), Peak Signal to Noise Ratio (PSNR) and Mean Square Error (MSE) performance of the MIMO-OFDM technique based on comparative analysis of modulation schemes namely QPSK over AWGN channels is carried out. Optimization of the system implemented in C has been carried out using Real View Development Suite (RVDS) by considering different ARM cores namely, ARM 1176, and ARM Cortex A8. Serialised image data was used to analyse the system performance. MSE and PSNR are computed for 4x4 MIMO-OFDM and compared with QPSK modulation.

For a color image, QPSK has PSNR of 58.6713 dB at SNR 5dB and for a binary image 78.195 dB at SNR 3 dB. Profiling results of the system developed in C is analysed in RVDS. ARM Cortex A8 gives better performance in terms of number of cycles estimated to execution of code and code coverage when compared with lower versions of it. After optimisation in ARM 1176, the number of cycles reduced is 39, 561. And in ARM Cortex A8 the number of cycles reduced is 31, 616. The performance of the system can be improvised by using the higher methods of sub-blocks like higher QAMs, increase the number of sub carriers in FFT and using advanced MIMO techniques.